1. Technical Field
The present invention relates to a method of manufacturing a semiconductor light emitting element, and a semiconductor light emitting element, and particularly to a manufacturing method which forms multiple protrusions in the uppermost layer of a semiconductor stacked or layered structure, and a semiconductor light emitting element manufactured by the method.
2. Description of the Related Art
Light emitting diodes (hereinafter, referred to as LEDs) are used mainly in tail lamps of automobiles, a variety of the backlights of display devices and mobile devices such as cellular phones. The demand for them for use in the headlights of automobiles, the backlights of liquid crystal displays, and general lights is expected to greatly increase in the future. The luminous efficiencies of current LEDs are at and around 50 lm/W (lumens/watt), and it is said that a luminous efficiency of 100 lm/W or greater is required of them to be used in backlights, lighting devices, or the like. The luminous efficiency of an LED is determined by the product of the internal quantum efficiency at light emission in the light emitting layer and the efficiency in taking the light outside (i.e., light extraction efficiency). To date, the internal quantum efficiency has been improved up to 80% or greater, but there is substantial room for improvement in the light extraction efficiency.
As a technique for improving the light extraction efficiency, it is known to perform asperity or protrusions/depressions process on the light emitting surface of a semiconductor light emitting element. By performing the asperity process on the light emitting surface, total reflection of light at the interface between the semiconductor light emitting element and encapsulation resin can be reduced, thus improving the light extraction efficiency.
This asperity shape can be formed by performing an appropriate process on each light emitting surface (a p-layer surface, the front/back surface of a growth substrate, and an n-layer surface after removal of a growth substrate) of a semiconductor light emitting element. Here, the “growth substrate” refers to a substrate that is used to grow semiconductor layers constituting a semiconductor light emitting element. For example, Japanese Patent Application Laid-Open Publication No. 2007-165409 (Reference 1) discloses a technique which improves the light extraction efficiency by forming pyramidal or pyramid-shaped protrusions in the surface of an n-layer (n-GaN layer) after removal of the growth substrate by wet etching using an alkaline solution such as KOH. A semiconductor light emitting element having such pyramidal protrusions is formed by undergoing the following process steps.
As shown in FIG. 1A, an epitaxial layer 15 structured to have an n-type semiconductor layer (n-layer) 12, an active layer 13, and a p-type semiconductor layer (p-layer) 14 sequentially laid one over another is formed on a sapphire substrate 11 (hereinafter, referred to as a growth substrate 11) used to grow an epitaxial layer (semiconductor layer), by a metal organic chemical vapor deposition (MOCVD) method (FIG. 1A). Then, a first electrode layer 16 is formed on the p-type semiconductor layer 14 by a vacuum evaporation method (FIG. 1B). Subsequently, a conductive support substrate 17 and the first electrode layer 16 are put opposite to and in close contact with each other and bonded together by thermal compression in a nitrogen atmosphere (FIG. 1C). Note that a solder layer (not shown) is formed on the conductive support substrate 17 and that by the solder layer melting and solidifying, the wafer having the epitaxial layer 15 and the first electrode layer 16 formed thereon can be bonded to the conductive support substrate 17. After the above bonding process, the growth substrate 11 is removed by a laser lift-off (LLO) method (FIG. 1D). Then, by performing wet etching using a KOH solution on the surface of the n-type semiconductor layer 12 exposed by laser lift-off, pyramidal protrusions 18 are formed in the surface of the n-type semiconductor layer 12 (FIG. 1E). After the protrusions 18 are formed, a second electrode layer 19 is formed by sputtering (FIG. 1F), and then by dicing into chips, semiconductor light emitting elements are finished.
Pits (depressions) deriving from crystal defects appear on the surface of the n-type semiconductor layer after the growth substrate is removed by laser lift-off. Here, the crystal defect refers to a dislocation (threading dislocation) caused by the difference in lattice constant (lattice misfit or mismatch) between the growth substrate and the semiconductor layer. If an electrode is formed on a surface where a lot of such pits are exposed, the problem occurs that electrode material goes into pits, causing a failure such as a leak or a short of current in the semiconductor light emitting element itself. Even where an electrode is not directly in contact with a pit (that is, an electrode is not formed on a pit), the use of the semiconductor light emitting element over a long time or the use of the semiconductor light emitting element in its high current range may cause electrode material to diffuse into the epitaxial layer and eventually reach a crystal defect, thus causing a failure such as a leak current or a short in the semiconductor light emitting element itself.
Japanese Patent Application Laid-Open Publication No. 2007-88404 (Reference 2) discloses a technique which improves the electrostatic discharge (ESD) resistance of semiconductor light emitting elements by filling crystal defects in the epitaxial layer with an insulating layer.